Storage Developer Conference

SSDs that support Zoned Namespace (ZNS) are increasingly popular for large-scale storage deployments due to their cost efficiency and performance improvements over conventional SSDs, which include 3-4x throughput increase, prolonged SSD lifetime, as well as making QLC media available to I/O heavy workloads. As the zoned storage hardware ecosystem has matured, its open-source software ecosystem has also grown. As a result, we are now emerging at a new stage that provides a solid foundation for large-scale cloud adoption. This talk describes SSDs that support Zoned Namespace s, the work of SNIA's Zoned Storage TWG to standardize ZNS SSD device models, and the quickly evolving software ecosystem across filesystems (f2fs, btrfs, SSDFS), database systems (RocksDB, TerarkDB, MySQL), and cloud orchestration platforms (Openstack and Kubernetes /w Mayastor, Longhorn, SPDK's CSAL). Learning Objectives 1) ZNS SSDs; 2) Emerging hardware & software eco-system for zoned storage; 3) Zoned storage cloud adoption.

The IEEE Security In Storage Work Group (SISWG) produces standards that many storage developers, storage vendors, and storage system operators care about, including: a) A family of standards on sanitization: the IEEE 2883 family b) A family of standards on encryption methods for storage components: the IEEE 1619 family c) A standard on Discovery, Authentication, and Authentication in Host Attachments of Storage Devices: the IEEE 1667 specification IEEE has a different work group (IEEE P3172) focusing on post-quantum cryptography, but when they are done, a family method that recommends new quantum encryption for various storage types (e.g., block, stream) may be appropriate for SISWG’s IEEE 1619 family. IEEE has a different work group focusing on Zero Trust Security (ZTS, IEEE P2887), however an application of those principles for storage devices and systems is also within the purview of the IEEE SISWG. Learning Objectives 1) Understand the scope of standards developed by the IEEE SISWG; 2) Understand the relevance of SISWG standards to the listener's business; 3) Understand how to participate in the IEEE SISWG.

The introduction of CXL has significantly advanced the enablement of memory disaggregation. Along with disaggregation has risen the need for reliable and effective ways to transparently tier data in real time between local direct attached CPU memory and CXL pooled memory. While the CXL hardware level elements have advanced in definition, the OS level support, drivers and application APIs that facilitate mass adoption are still very much under development and still in discovery phase. Even though memory tiering presents new challenges, we can learn a great deal from the evolution of storage from direct attached to storage area networks, software defined storage and early disaggregated/composable storage solutions such as NVMe over fabrics. Presented from the viewpoint of a real time block storage tiering architect with products deployed in more than 1 million PCs and servers.

It’s been a year since the announcement that Intel would “Wind Down” its Optane 3D XPoint memories. Has anything risen to take its place? Should it? This presentation reviews the alternatives to Optane that are now available or are in development, and evaluates the likelihood that one or more of these could fill the void that is being left behind. We will also briefly review the legacy Optane left behind to see how that legacy is likely to be used to support persistent memories in more diverse applications, including cache memory chiplets. Along the way we’ll show how Optane not only spawned new thinking on software, as embodied in the SNIA Nonvolatile Memory Programming Model, but also drove the creation of new communication protocols, particularly CXL and UCIe. Learning Objectives: 1) Understand the growing role of emerging memory technologies in future processors; 2) Learn how Persistence, NUMA, and Chiplets have blossomed in Optane's wake; 3) See how SNIA's NVM Programming Model will support tomorrow's software, even though Optane won't be using it.

One of the goals of HPE’s Spaceborne Computer program is proving the value of edge computing. Spaceborne Computer-1 (SBC-1) was launched in August of 2017 with the latest available COTS (Commercial off the Shelf) hardware, including twenty solid state disks (SSDs) for storage. The disappointing durability of those SSDs will be covered; the Failure Analysis (FA) of them upon Return To Earth (RTE) will be presented and the mitigation done in Spaceborne Computer-2 will be detailed. HPE’s Spaceborne Computer-2 (SBC-2) launched in February of 2021 with over 6 TB of internal SSD storage. Onboard storage of ISS-generated “raw” data is critical to proving the value of edge computing, to delivering results and insights to scientists and researchers faster and to enabling deeper exploration of the cosmos. The storage design will be summarized, including the concept of operations (ConOps) for backup and disaster recovery. Several successful SBC-2 edge computing experiments will be reviewed, all of which demonstrate a reduction in download size to Earth of at least 95%. Additionally, Spaceborne Computer-2 has access to the ISS Payloads Network Attached Storage (PL-NAS). The PL-NAS is a NASA file server with five hard drive bays and allows onboard ISS systems to access a shared folder location on the PL-NAS. A summary of the decision to opt for SSDs on HPE’s Spaceborne Computer instead of traditional hard drives will be presented. SBC-2 exploitation of the PL-NAS for EVA safety operations will be detailed. Finally, the market for anticipated edge services is being better defined and concepts will be presented, all of which require stable and reliable storage at the edge. Learning Objectives: 1)Storage considerations for space-based storage; 2) Value of capable "raw" storage to support edge computing, AI/ML and HPC; 3) Lessons learned from storage experiments in space; 4) Failure rates of SSDs in Space; 5) Future space-based services requiring storage.

Azure Disks provide block storage for Azure Virtual Machines and are a core pillar of the Azure IaaS platform. In this talk, we will provide an overview of Direct Drive - Azure's next-generation block storage architecture. Direct Drive forms the foundation for a new family of Azure disk offerings, starting with Ultra Disk (Azure's highest performance disks). We will describe the challenges of providing durable, highly-available, high-performance disks at cloud scale as well as the software and hardware innovations that allow us to overcome these challenges.

For the past three decades, PCI-SIG® has delivered a succession of industry-leading PCI Express® (PCIe®) specifications that remain ahead of the increasing demand for a high-bandwidth, low-latency interconnect for compute-intensive systems in diverse market segments, including data centers, Artificial Intelligence and Machine Learning (AI/ML), high-performance computing (HPC) and storage applications. In early 2022, PCI-SIG released the PCIe 6.0 specification to members, doubling the data rate of the PCIe 5.0 specification to 64 GT/s (up to 256 GB/s for a x16 configuration). To achieve high data transfer rates with low latency, PCIe 6.0 technology adds innovative new features like Pulse Amplitude Modulation with 4 levels (PAM4) signaling, low-latency Forward Error Correction (FEC) and Flit-based encoding. PCIe 6.0 technology is an optimal solution to meet the demands of Artificial Intelligence and Machine Learning applications, which often require high data bandwidth, low latency transport channels. This presentation will explore the benefits of PCIe 6.0 architecture for storage and AI/ML workloads and its impact on next-generation cloud data centers. Attendees will also learn about the potential AI/ML use cases for PCIe 6.0 technology. Finally, the presentation will provide a preview of what is coming next for PCIe specifications.

Los Alamos is working to revolutionize how scientific data management is done, moving from large Petabyte sized files generated periodically by extreme scale simulations to a record and column based approach. Along the journey, the NVMe Computational Storage efforts became a strategic way to help accomplish this revolution. Los Alamos has been working on a series of proof of concepts with a set of data storage industry partners and these partnerships have proven to be the key to success. This talk will summarize the three proof of concept applications of Computation Storage and some of the industry partnership projects that have helped pave the way for LANL and hopefully industry to new approaches to large scale data management.

Computational Storage is a new field that is addressing performance and scaling issues for compute with traditional server architectures. This is an active area of innovation in the industry where multiple device and solution providers are collaborating in defining this architecture while actively working to create new and exciting solutions. The SNIA Computational Storage TWG is leading the way with new interface definitions with Computational Storage APIs that work across different hardware architectures. Learn how these APIs may be applied and what types of problems they can help solve.

Synthetic DNA-based data storage is a major attraction due to the possibility of storage over long periods. This technology is a solution for the current data centers, reducing energy consumption and physical storage space. Nowadays, the quantity of data generated has been growing exponentially, while the storage capacity does not keep up with the growth, caused by new technologies and globalization.

Data persistence on CXL is an essential enabler toward the goal of instant-on processing. DRAM class performance combined with non-volatility on CXL enables a new class of computing architectures that can exploit these features and solve real-world bottlenecks for system performance, data reliability, and recovery from power failures. New authentication methods also enhance the security of server data in a world of cyberattacks.

Large-scale data analytics, machine learning, and big data applications often require the storage of a massive amount of data. For cost-effective high bandwidth, many data centers have used tiered storage with warmer tiers made of flashes or persistent memory modules and cooler tiers provisioned with high-density rotational drives. While ultra fast data insertion and retrieval rates have been increasingly demonstrated by research communities and industry at warm storage, complex queries with predicates on multiple columns tend to still experience excessive delays when unordered, unindexed (or potentially only lightly indexed) data written in log-structured formats for high write bandwidth is subsequently read for ad-hoc analysis at row level. Queries run slowly because an entire dataset may have to be scanned in the absence of a full set of indexes on all columns. In the worst case, significant delays are experienced even when data is read from warm storage. A user sees even higher delays when data must be streamed from cool storage before analysis takes place. In this presentation, we present C2, a research collaboration between Seagate and Los Alamos National Lab (LANL) for the lab's next-generation campaign storage. Campaign is a scalable cool storage tier at LANL managed by MarFS that currently provides 60 PBs of storage space for longer-term data storage. Cost-effective data protection is done through multi-level erasure coding at both node level and rack level. To prevent users from always having to read back all data for complex queries, C2 enables direct data analytics at the storage layer by leveraging Seagate Kinetic Drives to asynchronously add indexes to data at per-drive level after data lands on the drives. Asynchronously constructed indexes cover all data columns and are read at query time by the drives to drastically reduce the amount of data that needs to be sent back to the querying client for result aggregation. Combining computational storage technologies with erasure coding based data protection schemes for rapid data analytics over cool storage presents unique challenges in which individual drives may not be able to see complete data records and may not deliver performance required by high-level data insertion, access, and protection workflows. We discuss those challenges in the talk, share our designs, and report early results.

Azure Block Storage, also referred to as Azure Disks, is the persistent block storage for Azure Virtual Machines and a core pillar for Azure IaaS infrastructure. Azure offer unique block storage capabilities that differentiate it from other Cloud Block Storage offerings. In this talk, we will use a few of these capabilities as examples to reveal the technical designs behind and how they are tied to our XStore storage architecture. Starting with fast restore from snapshot, we will share the CoR technology built to orchestrate instant Disk recovery from snapshots stored in different storage medias. In addition, we will highlight how multi-protocol support is enabled on block storage for SCSI and REST access leveraging our 3-layer XStore architecture. We will conclude with recent enhancements to XStore architecture and upcoming innovations.

If you haven’t caught the new wave in storage management, it’s time to dive in. This presentation provides a broad look at the Redfish and Swordfish ReSTful hierarchies, maps these to some common applications, and provides an overview of the Swordfish tools and documentation ecosystem developed by SNIA’s Scalable Storage Management Technical Work Group (SSM TWG) and the Redfish Forum. It will also provide an overview of what’s new in ’22, including enhancements to NVMe support, storage fabric management, and capacity and performance metric management.

With Amazon S3 celebrating its sixteenth birthday this year, it's easy to forget just how revolutionary it was at its release. S3's buckets and objects were profoundly different from the directories and files that developers had been manipulating through filesystem APIs. What drove this innovation, and how does cloud object storage actually work? In this session, Pat Patterson, Chief Developer Evangelist at Backblaze, will trace the evolution of cloud object storage, explain the trade-offs in implementing secure, reliable, scalable online data storage, and give a detailed technical explanation of Backblaze B2 Cloud Storage’s implementation.

Data bytes stored continues to grow at about 40% annually. This trend now exceeds the device capacity growth rate of all existing commercial scale media types including HDD, Flash, Tape and Optical, and the gap between growth rates is about 20%. That implies that the datacenter footprint for storage will be approximately doubling every 3.5 years just to keep up. However, the roadmaps for ongoing density improvement makes the situation much more stark. Past 2030, growth in device capacities may slow substantially leading to a need for 40x or more datacenter space and power by 2040 to keep up with data growth. Although the methods we have used to store data with magnetized materials or corralling electrons are true technological wonders, it is becoming apparent that if we don't want to impinge data growth we may need a substantial paradigm shift in storage technology. Molecular storage is the panacea of storage density and DNA is the leading contender for the championship of storage density, but we will also need to invest in technologies that allow for high speed molecular storage. This is going to be a heavy lift, but if we want to intercept the coming storage capacity crunch we need to start work now.

SMB3 has seen significant adoption as the storage protocol of choice for running private cloud deployments. In this iteration of the talk, we’ll update the audience on SMB protocol changes as well as improvements to the Windows implementation of the SMB server and client. Added to the SMB protocol is a new server-to-client notification mechanism, which enables a variety of novel use cases. We’ll present the details of protocol messaging (new message types, etc) as well as the one scenario which leverages this new mechanism (server-triggered graceful session closure). In addition to the protocol changes, we’ll provide an overview of the latest feature additions to the Windows SMB server and client: authentication rate limiting to protect against password spray attacks, and upcoming improvements to SMB over QUIC.

DNA data storage will dramatically effect the way organizations think about data retention, data protection, and archival by providing capacity density and longevity several orders of magnitude beyond anything available today, while reducing requirements for both power, cooling, and fixity checks. One of challenges of any long term archival storage is being able to recover the data after possibly decades or longer. To do this, the reader must be able to bootstrap the archive, akin to how an OS is loaded after the master boot record is loaded. This talk will describe our initial work to define a standard schema for a self-describing DNA data archive sector zero, which will be as generic as possible, exploiting the format immutability of the natural DNA molecule to assure the archive can be bootstrapped by sequencers decades in the future, all while enabling archive writers to continue innovation in how the balance of the archive is synthesized. We call this the “DNA Rosetta Stone” project.

The industry needs a new storage medium that is more dense, durable, sustainable, and cost effective to cope with the expected future growth of archival data. DNA, nature’s data storage medium, enters this picture at a time when synthesis and sequencing technologies for advanced medical and scientific applications are enabling the manipulation of synthetic DNA in ways previously unimagined. This session will provide and overview of why DNA data storage is compelling and what the DNA Data Storage Alliance is doing to help build an interoperable DNA Data Storage ecosystem.

NVMe and SNIA are both working on standards related to Computational Storage. The question that is continually asked is are these efforts are compatible or at odds with each other. The truth is that many of the same people are working on both of these standards efforts and are very interested in ensuring that they work together as opposed to conflicting with each other. This presentation will discuss how the two standards efforts go hand in hand, the aspects of the SNIA API that support the NVMe efforts, and the NVMe efforts to share common architectural structures with those defined in SNIA. As part of this discussion, a lexicon of terminology used in both organizations will be presented and the decoder ring that allows you to understand one document in terms of the other in spite of some differences in names used.

With the ongoing work in the SNIA Computational Storage Technical Work Group, the chairs will present the latest updates from the membership of the working group. In addition, the latest release will be reviewed at a high level to provide attendees a view into next steps and implementation of the specification in progress. Use cases, Security considerations, and other key topics with also be addressed.

Software memory copies have been the gold standard for applications performing memory data movement or operations in system memory. With new accelerators and memory types enriching the system architecture, accelerator-assisted memory data movement and transformation needs much-needed standardization. SNIA's SDXI (Smart Data Accelerator Interface) TWG is at the forefront of standardizing this and has been working towards a v1.0 since its formation in June 2020. In this talk, SNIA SDXI TWG members will summarize the SNIA SDXI specification’s development journey, its various use cases, and features leading to SNIA SDXI v1.0. Further, this talk will shed some light on future directions for the specification. Learning Objectives: 1) Learn from the experts designing a standard for memory to memory data movement and acceleration; 2) SDXI specification v1.0 internals; 3) SDXI Usecases; 4) Applicability to Accelerators, Persistent Memory, Computational Storage, CXL, and other industry trends.

2022 has been an interesting and challenging year for storage security. The cyber threat landscape has witnessed large numbers of attacks impacting data and increased nation state activities directed at critical infrastructure. The regulatory landscape is undergoing change as well (e.g., EU Directive 2009/125/EC also known as LOT 9) and potentially imposing requirements that necessitate adjustments to security capabilities, controls, and practices to reflect new realities. By the end of 2022 there will be significant changes to security standards and specifications relevant to storage. New technologies could increase the storage security options. Lastly, new practices and deployment strategies could add further data protections. This session concentrates on the new and emerging storage security elements and issues rather than covering storage security from a general perspective. In addition, the session homes in on those aspects that are potentially relevant to developers and architects. Learning Objectives: 1) Understand key threat and regulatory landscape issues that could affect storage development; 2) Identify important security standards and specifications that should be considered in the development of storage products; 3) Recognize the implications and challenges associated with new practices and deployment strategies.

The Key Per IO (KPIO) project is a joint initiative between NVM Express® and the Trusted Computing Group (TCG) Storage Work Group to define a new KPIO Security Subsystem Class (SSC) under TCG Opal SSC for NVMe® class of Storage Devices. Self-Encrypting Drives (SED) perform continuous encryption on user accessible data based on contiguous LBA ranges per namespace. This is done at interface speeds using a small number of keys generated/held in persistent media by the storage device. KPIO will allow large number of encryption keys to be managed and securely downloaded into the NVM subsystem. Encryption of user data then occurs on a per command basis (each command may request to use a different key). This provides a finer granularity of data encryption that enables a granular encryption scheme in order to support use cases: Support of EU - GDPR Support of data erasure when data is spread over many disks, support of data erasure of data that is mixed with other data needing to be preserved (multitenancy), assigning an encryption key to a single sensitive file or host object. The presentation will introduce the architectural differences between traditional SEDs and the KPIO SSC, provide an overview of the proposed TCG KPIO SSC spec and the features in the NVMe commands to allow use of KPIO, and conclude by summarizing the current state of the standardization proposals in NVM Express and the TCG Storage WG. Learning Objectives: 1) Understand how encryption of data at rest protects that data today; 2) Understand how fine grain encryption (KPIO) will be used to protect data at rest in the future; 3) Understand possible use cases for KPIO (multi-tenant use of a common device, EU GDP use cases, others).

NVM Express® (NVMe®) has become synonymous with high-performance storage with widespread adoption in client, cloud, and enterprise applications. The NVMe 2.0 family of specifications, released in June 2021, allow for faster and simpler development of NVMe solutions to support increasingly diverse environments, now including Hard Disk Drives (HDDs). The extensibility of the specifications encourages the development of independent command sets like Zoned Namespaces (ZNS) and Key Value (KV) while enabling support for the various underlying transport protocols common to NVMe and NVMe over Fabrics (NVMe-oF™) technologies. This presentation provides an overview of the latest NVMe technologies, summarizes the NVMe standards roadmap, and describes new NVMe standardization initiatives. Learning Objectives: 1) Gain an overview of the latest NVMe technologies; 2) Summarize the NVMe standards roadmap; 3) Describe new NVMe standardization initiatives.

Emerging memory technologies have gotten a couple of big boosts over the past few years, one in the form of Intel’s Optane products, and the other from the migration of CMOS logic to nodes that NOR flash, and now SRAM, cannot practically support. Although these appear to be two very different spheres, a lot of the work that has been undertaken to support Intel’s Optane products (also known as 3D XPoint) will lead to improved use of persistent memories on processors of all kinds: “xPUs”. In this presentation we will review emerging memory technologies and their roles in replacing other on-chip memories, the developments through SNIA and other organizations fostered by Optane, but usable in other aspects of computing, the emergence of new Near/Far Memory paradigms that have spawned interface protocols like CXL and OMI, and the emergence of “Chiplets,” and their potential role in the evolution of persistent processor caches. Learning Objectives: 1) New memories and their impact on computing architecture; 2) Near & Far Memory and how it interacts with new persistent memory technologies; 3) How the adoption of chiplets impacts these changes.

Smart Data Accelerator Interface (SDXI) is a proposed standard for a memory to memory data movement and acceleration interface. Software memcpy is the current data movement standard for software implementation due to stable CPU ISA. However, this takes away from application performance and incurs software overhead to provide context isolation. Offload DMA engines and their interface are vendor-specific and not standardized for user-level software. SNIA’s SDXI TWG is tasked with developing and standardizing an extensible, forward-compatible memory to memory data mover and acceleration interface that is independent of actual data mover implementations and underlying I/O interconnect technology. In this panel discussion, experts and representatives of SDXI TWG member companies will talk about their motivations in joining this industry-standard effort. Learning Objectives: 1) Learn from the experts desigining a standard for memory to memory data movement and acceleration; 2) Learn about the use cases of interest to SDXI TWG member companies; 3) Learn about the ecosystem being developed by SDXI member companies for data movers and accelerators.

In this presentation the Co-Chairs of the Computational Storage Technical Working Group (CS TWG) will provide a status update from the work having been done over the last year, including the release of the new Public Review materials around Architecture and APIs. We will update the status of the definition work and address the growing market and adoption of the technology with contributions from the 47+ member organizations participating in the efforts. We will show use cases, customer case studies, and efforts to continue to drove output from the Technical efforts. Learning Objectives: 1) Learn the Latest of the work done by CS TWG; 2) Computational Storage Architectures API Deployment; 3) Customer Case Studies; 4) Market Update and Overview.

For the last eight years Backblaze has collected daily operational data from the hard drives in our data centers. This includes daily SMART statistics from over 250,000 hard drives, and SSDs, totaling nearly two exabytes of storage, and totaling over 200 million data points. We'll use this data to examine the following: - the lifetime failure statistics for all the hard drives we have ever used. - how has temperature effects the failure rate of hard drives. - a comparison the failure rates of helium filled hard drives versus air-filled hard drives. - the SMART stats we use to indicate whether a Hard Drive may fail and if you can use SMART stats to predict hard drive failure. - how SSD failure rates compare to HDD failure rates. The data we use is available for anyone to download and use for their own experimentation and education. Learning Objectives 1) How have the hard drives we have under management performed over time; 2) How you can use SMART stats at scale to determine patterns in hard drive behavior; 3) A look at real word data comparing the failure rates of HDD and SSD devices; 4) How anyone can download and use the data set we have collected.

Current storage technologies include a range of security features and capabilities to allow storage to serve as a last line of defense in an organization’s defense in depth strategy. However, the threat landscape continues to change in negative ways, so new responses are needed. Additionally, the storage technology itself is changing to address the increased capacity and throughput needs of organizations. Technical work in ISO/IEC, IEEE, NVM Express, DMTF, OpenFabric Alliance, Trusted Computing Group (TCG), Open Compute Project (OCP), Storage Networking Industry Association (SNIA), etc. are introducing new storage technologies, specifying the way storage fits into increasingly complex ICT ecosystems, and identifying protection mechanism for data and the systems themselves. Understanding these developments and their interrelationships will be critical for securing storage systems of the future. This session highlights important storage security elements of both current and emerging storage technologies, including encryption, key management, storage sanitization, roots of trust and attestations, secure communications, and support for multitenancy. Like storage, security technologies are also changing, so crypto-agility, protocol changes, and security practices (e.g., zero trust) are explored. Learning Objectives: 1) Understand current storage security guidance and requirements; 2) Identify security aspects of emerging storage technology; 3) Recognize the implications and challenges associated with securing storage.

The SNIA Computational Storage TWG is driving forward with both a CS Architecture specification and a CS API specification. How will these specification affect the growing industry Computational Storage efforts? Learn what is happening in industry organizations to make Computational storage something that you can buy from a number of vendors to move your computation to where your data resides. Hear what is being developed in different organizations to make your data processing faster and allow for scale-out storage solutions to multiply your compute power. Learning Objectives: 1) Learn what is going on in the standards bodies; 2) Learn how the standards can help you utilize Computational Storage; 3) Learn about where Computational Storage is being standardized and how to get involved.

DNA data storage is an attractive option for digital data storage because of its extreme density, durability and eternal relevance. This is especially attractive when contrasted with the exponential growth in world-wide digital data production. In this talk we will present our efforts in building an end-to-end system, from the computational component of encoding and decoding to the molecular biology component of random access, sequencing and fluidics automation. We will also discuss some early efforts in building a hybrid electronic/molecular computer system that can offer more than just data storage, for example, image similarity search. Learning Objectives: 1) Describe the properties of synthetic DNA as a digital data storage medium; 2) Describe how an end-to-end DNA data storage system works; 3) Describe how to perform certain types of computation with synthetic DNA molecules.

The SNIA Swordfish specification has expanded to include full NVMe and NVMe-oF enablement and alignment across DMTF, NVMe, and SNIA for NVMe and NVMe-oF use cases. This presentation will provide an overview of the most recent work adding detailed implementation requirements for specific configurations, ensuring NVMe and NVMe-oF environments can be represented entirely in Swordfish and Redfish environments. Learning Objectives: 1) Describe how the NVMe and NVMe-oF environments can be managed in Swordfish and Redfish; 2) Provide an overview of current work in progress to extend NVMe and NVMe-oF manageability in Swordfish; 3) Describe the updated guidance for implementations in Swordfish profiles and documentation.

Over the past nearly three decades, PCI-SIG® has delivered a succession of industry-leading specifications that remain ahead of the curve of the increasing demand for a high-bandwidth, low-latency interconnect for compute-intensive systems in diverse market segments, including data centers, PCs and automotive applications. Each new PCI Express® (PCIe®) specification consistently delivers enhanced performance, unprecedented speeds, and low latency – doubling the data rate over previous generations. The PCIe 6.0 specification – targeted for final release in 2021 – will deliver 64 GT/s data rate (256 GB/s via x16 configuration), while maintaining backward compatibility with previous generations. In this session, attendees will learn the nuts and bolts of PCIe 6.0 architecture and how it will enable high-performance networking. Some key features of the upcoming specification include PAM4 encoding, low-latency Forward Error Correction (FEC), and backward compatibility with all previous generations of PCIe technology. This presentation will also highlight PCIe 6.0 technology use cases and the heterogenous computing applications that will be accelerated by PCIe 6.0 technology, including artificial intelligence, machine learning and deep learning. Finally, attendees will receive an update on the release timeline of the PCIe 6.0 specification later this year and rollout of the interoperability and compliance program. Learning Objectives: 1) Attendees will learn the nuts and bolts of PCIe 6.0 architecture and how it will enable high-performance networking; 2) Key features of the upcoming PCIe 6.0 specification; 3) PCIe 6.0 technololgy use cases and the heterogenous computing applications that will be accelerated by PCIe 6.0.

Abstract Block storage access across Storage Area Networks (SANs) have an interesting protocol and transport history. The NVMe-oF transport family provides storage administrators with the most efficient and streamlined protocols so far leading to more efficient data transfers and better SAN deployments. In this session we will explore some of the protocol history to set the context for a deep dive into NVMe/TCP, NVMe/RoCE, and NVMe/FC. We will then examine network configurations, network topology, QoS settings, and offload processing considerations. This knowledge is critical when deciding how to build, deploy, operate, and evaluate the performance of a SAN as well as understanding end to end hardware and software implementation tradeoffs. Agenda SAN Transport History and Overview Protocol History Protocol Comparisons NVMe/FC Deep Dive NVMe/RoCE Deep Dive NVMe/TCP Deep Dive Networking Configurations and Topologies for NVMe-oF QoS, Flow Control and congestion L2 local vs L3 routed vs Overlay Offload Processing Considerations and Comparisons Learning Objectives: 1) Cross Comparison of SAN transports; 2) First principles behavior for NVMe-oF transports; 3) Practical networking considerations for deploying NVMe-oF; 4) Implications of NVMe-oF transports for data flow and packet processing.

Traditional Storage Node consists of Compute, Networking and Storage elements. In this case, the entire node is a single failure domain and as such both data and meta data are maintained in storage. Emergence of CXL allows us to re-think the traditional storage node architecture. In future, the storage (behind CXL IO) and metadata memory (behind a CXL memory) can be disaggregated locally or across a bunch of storage nodes to improve the availability of the data. Further, memory persistence can be achieved at a granular level using CXL memory devices. Future extensions to CXL with fabric like attributes have potential to further extend the data replication capabilities of the storage platform. In this talk, we will discuss the various platform architecture options that are emerging for the storage node and how they can change the face of traditional storage node organization. Learning Objectives: 1) Illustrate that the current architecture assumptions for Storage node need to be revisited; 2) Explore options for new storage node architecture with CXL; 3) Explore architecture options for storage node with a fabric extension (beyond today's CXL); 4) Encourage partnership with industry to work together on storage node innovation; 5) Explore storage infrastructure disaggregation and its value to future of storage.

Adopting new memory technologies such as Persistent Memory and CXL-attached Memory is a challenge for software. While libraries and frameworks (such as PMDK) can help developers build new software around emerging technology, legacy software faces a more severe challenge. At IBM Research Almaden we are exploring a new approach to managing heterogeneous memory in the context of Python. Our solution, PyMM, focuses on ease-of-use and is aimed primarily at the data science community. This talk will outline PyMM and discuss how it is being used to manage Intel Optane persistent memory. We will review the PyMM programming abstractions and some early data science use-cases. PyMM is currently an early research prototype with open source availability. Learning Objectives: 1) Understand the emergence of heterogeneous memories (e.g., Optane, CXL-attached); 2) Understand the challenges facing integration of legacy s/w with new memory technology; 3) Introduction and demonstration of PyMM; 4) Outline of some existing use cases.

Storage interfaces have evolved more in the past 3 years than in the previous 20 years. In Linux, we see this happening at two different layers: (i) the user- / kernel-space I/O interface, where io_uring is bringing a low-weight, scalable I/O path; and (ii) and the host/device protocol interface, where key-values and zoned block devices are starting to emerge. Applications that want to leverage these new interfaces have to at least change their storage backends. This presents a challenge for early technology adopters, as the mature part of the Linux I/O stack (i.e., the block layer I/O path) might not implement all the needed functionality. While alternatives such as SDPK tend to be available more rapidly, the in-kernel I/O path presents a limitation. In this talk, we will present how we are enabling an asynchronous I/O path for applications to use NVMe devices in passthru mode. We will speak to the upstream efforts to make this path available in Linux. More specifically, we will (i) detail the changes in the mainline Linux kernel, and (ii) we will show how we are using xNVMe to enable this new I/O path transparently to applications. In the process, we will provide a performance evaluation to discuss the trade-offs between the different I/O paths in Linux, including block I/O io_uring, passthru io_uring, and SPDK. Learning Objectives: 1) Understand the value of I/O passthru; 2) Understand the changes merged into the Linux kernel to support NVMe I/O Pasthru; 3) Understand how to leverage this new I/O path without application changes through xNVMe.

NVMe/TCP has the potential to provide significant benefits in application environments ranging from the Edge to Data Center. However, to fully unlock its potential, we first need to overcome NVMe over Fabrics' discovery problem. This discovery problem, specific to IP based fabrics, can result in the need for the Host admin to configure each Host to access the appropriate NVM subsystems. In addition, any time an NVM Subsystem is added or removed, the Host admin needs to update the impacted hosts. This process of explicitly updating the Host any time a change is made does not scale when more than a few Host and NVM subsystem interfaces are being used. Also, due to the de-centralized nature of this process, it also adds complexity when trying to use NVMe-oF in environments that require high-degrees of automation. For these and other reasons, Dell Technologies, along with several other companies, have been collaborating on innovations that enable an NVMe-oF IP Based fabric to be centrally managed. These innovations, being tracked under nvme.org’s Technical Proposals TP-8009 and TP-8010, enable administrators to set a policy that defines the relationships between Hosts and the NVM subsystems they need to access. These policies are then used by a Centralized Discovery Controller to allow each Host to automatically discover and connect to only the appropriate NVM subsystems and nothing else. Learning Objectives: 1) Explain NVMe-oF’s discovery problem; 2) Review the network topologies that can support the automated Discovery of NVMe-oF Discovery Controllers; 3) Explore the differences between a FC SAN and an IP based SAN used to transport NVMe-oF/TCP; 4) Understand the proposed discovery process through in-depth review of the discovery protocol.

Malware, short for malicious software, is a blanket term for viruses, worms, trojans and other harmful software that attackers use to damage, destroy, and gain access to sensitive information; software is identified as malware based on its intended use, rather than a particular technique or technology used to build it. Ransomware is a blended malware attack that uses a variety of methods to target the victim’s data and then requires the victim to pay a ransom (usually in crypto currency) to the attacker to regain access to the data upon payment (with no guarantees). However, the landscape is changing, and ransomware is no longer just about a financial ransom. Attacks are now being aimed at the infrastructure and undermining public confidence, witness recent headlines regarding incidents affecting police informant databases and oil pipeline sensors. There is also the recent US Treasury guideline to businesses advising them not to pay the ransom. What can we realistically do to prevent such attacks, or do we simply surrender and accept we will lose our data and that the insurance payout will cover any loss? There is increasing evidence that the insurance companies are unwilling to meet those claims, so the situation is perilous as the criminals always appear one step ahead. As a starting point, everyone needs to start assuming they will be attacked at some stage – therefore prevention and mitigation strategies should be based on that assumption. This session outlines the current threats, the scale of the problem, and examines the technology responses currently available as countermeasures. What can be done to prevent an attack? What works and what doesn’t? What should storage developers be thinking about when developing products that need to be more resilient to attack? Learning Objectives: 1) Current ransomware trends and scale; 2) Effectiveness of current data protection technology; 3) What other defensive measures should be considered.

Blockchain has revolutionized decentralized finance, and with smart-contracts has enabled the world of Non-Fungible Tokens, set to revolutionize industries such as art, collectibles and gaming. Blockchains, at the very core, are distributed chained hashes. They can be leveraged to store information in a decentralized, secure, encrypted, durable and available format. However, some of the challenges in Blockchain stem from the bloat of storage. Since each participating node will keep a copy of the entire chain, the same data gets replicated on each node, and even a 5MB file stored on the chain can exhaust systems. Several techniques have been used by different implementations to allow Blockchains for distributed storage of data. The advantages compared to cloud storage would be the decentralized nature of storage, the security provided by encrypting content, and the costs. In this session, we will discuss how different blockchain implementations such as Storj, InterPlanetary File System, YottaChain, and ILCOIN have solved the problem of storing data on the chain, but avoiding bloat. Most of these solutions store the data off-chain and store the transactions metadata on the blockchain itself. IPFS & Storj for example, uses content-addressing to uniquely identify each file in a global namespace connecting all the computing devices. The incoming file is encrypted, and split into smaller chunks, and each participating node will store a chunk with zero-knowledge of the other chunks. ILCOIN relies on RIFT protocol to enable two level blockchains, one for the standard blocks, and the other for the mini-blocks that comprise the transactions and which are not mined, but generated by the system. Yottachain uses deduplication after encrypting content, which is not generally the way data storage is designed for cloud, to reduce the footprint of data on the chain. We will discuss the tradeoffs of these solutions and how they aim to disrupt cloud storage. We will compare the benefits provided in terms of security, scalability and costs, and how organizations such as Netflix, Box, Dropbox can benefit from leveraging these technologies. Learning Objectives: 1) Learn about the Blockchains and how they are designed to store small amounts of information; 2) Learn about different blockchain projects such as IPFS, Yottachain, Storj, ILCOIN and their implementations; 3) How blockchain based storage solutions can provide better benefits to existing cloud storage; 4) Impact of leveraging blockchain storage on companies such as Netflix, Box, Dropbox.

Polled mode applications such as the Storage Performance Development Kit (SPDK) NVMe over Fabrics target can demonstrate higher performance and efficiency compared to applications with a more traditional interrupt-driven threading model. But this performance and efficiency comes at a cost of increased CPU core utilization when the application is lightly loaded or idle. This talk will introduce a new SPDK scheduler framework which enables transferring work between CPU cores for purposes of shutting down or lowering frequency on cores when under-utilized. We will first describe the SPDK architecture for lightweight threads. Next, we will introduce the scheduler framework and how a scheduler module can collect metrics on the running lightweight threads to make scheduling decisions. Finally, we will share initial results comparing SPDK NVMe-oF target performance and CPU efficiency of a new scheduler module based on this framework with the default static scheduler. Learning Objectives: 1) Understand how work is scheduled in an SPDK polled mode application such as the NVMe over Fabrics target; 2) Understand how SPDK scheduler modules under the new framework can decide if and when to move work between CPU cores; 3) Understand how performance + CPU efficiency compare between the default scheduler and scheduler implemented in the new framework.

In this talk you will learn about the reasons for building a specialized storage system for databases, and how Aurora databases are built using such a storage system in cloud.

The NVM Express® (NVMe®) family of specifications, released in June 2021, allow for faster and simpler development of NVMe solutions to support the increasingly diverse NVMe device environment, now including Hard Disk Drives (HDDs). The extensibility of the specifications encourages the development of independent command sets like Zoned Namespaces (ZNS) and Key Value (KV) while enabling support for the various underlying transport protocols common to NVMe and NVMe over Fabrics (NVMe-oF™) technologies. The NVMe 2.0 library of specifications have been broken out of multiple documents, including the NVMe Base specification, various Command Set specifications, various Transport specifications and the NVMe Management Interface specification. In this session, attendees will learn how the restructured NVMe 2.0 specifications enable the seamless deployment of flash-based solutions in many emerging market segments. This session will provide an overview and usages for several the new features in the NVMe 2.0 Specifications including ZNS, KV, Rotational Media and Endurance Group Management. Finally, the session will cover how these new features will benefit the cloud, enterprise and client market segments. Learning Objectives: 1) Learn how the restructured NVMe 2.0 specifications enable the seamless deployment of flash-based solutions in many emerging mark; 2) Gain an overview of usages for several the new features in the NVMe 2.0 Specifications; 3) Learn how the features will benefit the cloud, enterprise and client market segments.

Data center architectures continue to evolve rapidly to support the ever-growing demands of emerging workloads such as artificial intelligence, machine learning and deep learning. Compute Express Link™ (CXL™) is an open industry-standard interconnect offering coherency and memory semantics using high-bandwidth, low-latency connectivity between the host processor and devices such as accelerators, memory buffers, and smart I/O devices. CXL technology is designed to address the growing needs of high-performance computational workloads by supporting heterogeneous processing and memory systems for applications in artificial intelligence, machine learning, communication systems, and high-performance computing (HPC). These applications deploy a diverse mix of scalar, vector, matrix, and spatial architectures through CPU, GPU, FPGA, smart NICs, and other accelerators. During this session, attendees will learn about the next generation of CXL technology. The CXL 2.0 specification, announced in 2020, adds support for switching for fan-out to connect to more devices; memory pooling for increased memory utilization efficiency and providing memory capacity on demand; and support for persistent memory. This presentation will explore the memory pooling features of CXL 2.0 and how CXL technology will meet the performance and latency demands of emerging workloads for data-hungry applications like AI and ML. Learning Objectives: 1)Learn about CXL 2.0, the next generation of Compute Express Link technology; 2) Memory pooling features of CXL 2.0; 3) How CXL will meet the performance and latency demands of emerging workloads for data-hungry applications like AI and ML.

Although quantum technology can be leveraged to do many amazing things, it is not able to provide a general replacement for the storage capabilities we have today with HDDs and SSDs. However, there are a few things where quantum can be leveraged to provide some capabilities that are related to storage and this presentation will cover them. The presentation will start with a quick overview of some of the basic concepts of quantum technology and the reasons why quantum computing may potentially provide significant performance improvements over classical computing for certain applications. It will discuss how quantum computing does implement something similar to computational storage and follow that by explaining how quantum memories can be utilized in certain applications. It will wrap up by explaining how quantum computers work very closely with classical computers to form hybrid classical/quantum processing systems and mention that traditional SSD and HDD storage devices will still be needed on the classical side to support these types of systems.

Emerging and existing applications with cloud computing, 5G, IoT, automotive, and high-performance computing are causing an explosion of data. This data needs to be processed, moved, and stored in a secure, reliable, available, cost-effective, and power-efficient manner. Heterogeneous processing, tiered memory and storage architecture, accelerators, and infrastructure processing units are essential to meet the demands of this evolving compute, memory, and storage landscape. These requirements are driving significant innovations across compute, memory, storage, and interconnect technologies. Compute Express Link* (CXL) with its memory and coherency semantics on top of PCI Express* (PCIe) is paving the way for the convergence of memory and storage with near memory compute capability. Pooling of resources with CXL will lead to rack-scale efficiency with efficient low-latency access mechanisms across multiple nodes in a rack with advanced atomics, acceleration, smart NICs, and persistent memory support. In this talk we will explore how the evolution in load-store interconnects will profoundly change the memory, storage, and compute landscape going forward.

Amazon FSx for Lustre, a fully managed service that makes it easy and cost-effective for AWS customers to launch and run a Lustre high performance file system for their data-intensive applications. In this talk I shall introduces you to the features and benefits of the service, such as its massively scalable performance, seamless integration with Amazon S3(object storage), and compatibility with customer applications. Several use cases in particular, we will see how this file system can accelerates and simplifies training Machine Learning models. Learning Objectives: Understand Amazon FSx for Lustre internals,How Amazon FSx can be used so that you can accelerate Machine Learning Training,Hands on demo, so that participants can implement the same,Understand how FS Storage is consumed on AWS and design consideration.

This session highlights the differences between retention and preservation. In this session, we will cover: a. Requirements that govern how specific information is maintained b. How long specific information must be kept c. Whether and how specific information is protected and secured d. Understand why data classification is important when setting up data retention policies e. Understand why retention schedules are important f. Understand why regulatory compliance is a major consideration for Preservation requirements Learning Objectives: Understand the difference between data preservation and data retention,Understand why data classification is important when setting up data retention policies,Understand why retention schedules are important,Understand why regulatory compliance is a major consideration for Preservation requirements

The Skyhook Data Management project (skyhookdm.com) at UC Santa Cruz brings together two very successful open source projects, the Ceph object storage system, and the Apache Arrow cross-language development platform for in-memory analytics. It introduces a new class of storage objects to provide an Apache Arrow-native data management and storage system for columnar data, inheriting the scale-out and availability properties of Ceph. SkyhookDM enables single-process applications to push relational processing methods into Ceph and thereby scale out across all nodes of a Ceph cluster in terms of both IO and CPU. To highlight the benefits, we will present performance for various physical layouts and query workloads over example tables of 1 billion rows, as we scale out the number of nodes in a Ceph cluster. In this talk, we first describe how we partition Apache Arrow columnar data into Ceph objects. We consider both horizontal and vertical partitioning (rows vs. columns) of tables. In contrast to objects storing opaque byte streams where the meaning of the data must be interpreted by a higher level application, Apache Arrow data can be partitioned along semantic boundaries such as columns and rows so that relational operators like selection and projection can be performed in objects storing semantically complete data partitions. Next we introduce our SkyhookDM extensions that utilize Ceph’s “CLS” plugin infrastructure to execute our methods directly on objects, within the local OSD context. These access methods use the Apache Arrow access library to operate on Arrow data within the context of an individual object and implement relational processing methods, physical data layout changes, and localized indexing of data. Relational processing methods include SELECT, PROJECT, ORDER BY, and GROUP BY with partial aggregations (e.g., local min, max, sum, count, etc.). Physical data layout operations currently supported include transforming objects between row and column layouts, which we plan to extend to co-group columns on objects. Localized indexing is performed as a new object write method and supports index lookups that are beneficial to both point queries and range queries. SkyhookDM is accessed via a user-level C++ library on top of librados. The SkyhookDM library comes with Python bindings and is used in a PostgreSQL Foreign Data Wrapper. The source code is available at github.com/uccross/skyhookdm-ceph-cls under LGPLv2. SkyhookDM is an open source incubator project at the Center for Research in Open Source Software at UC Santa Cruz (cross.ucsc.edu). This work was in part supported by the National Science Foundation under Cooperative Agreement OAC-1836650. Learning Objectives: Using Ceph object classes to scale out relational data storage and access; Formatting, storing, and processing relational data directly in Ceph objects using librados; Indexing and physical data layout of relational data within Ceph objects.

DMTF’s Redfish® is a standard designed to deliver simple and secure management for converged, hybrid IT and the Software Defined Data Center (SDDC). This presentation will provide an overview of DMTF’s Redfish standard. It will also provide an overview HPE’s implementation of Redfish, focusing on their storage implementation and needs. HPE will provide insights into the benefits and challenges of the Redfish Storage model, including areas where functionality added to SNIA™ Swordfish is of interest for future releases. Learning Objectives: Introduce the DMTF Redfish AP; Provide an overview of HPE’s shipping Redfish Storage implementation; Understand where SNIA Swordfish is of interest for HPE’s server-attach storage implementations

Serial Attached SCSI (SAS) is the only storage interface that embraces both high performance and high reliability, as well as providing native compatibility with low-cost per gigabyte SATA drives. This capability allows SAS to span a variety of storage environments, including tiered storage solutions. Large-scale data infrastructures utilize tens of thousands of HDDs and SSDs. Hyperscale companies need to be able to carefully manage them from a global perspective in a cost-effective way. During this presentation, the speaker will review the benefits of tiered storage and how the latest features standardized in 24G SAS storage interface technology is helping enterprises store and move data across a range of storage media with different characteristics, such as performance, cost and capacity. Learning Objectives: The latest features of SAS,The benefits of tiered storage,How developers and users can take advantage of 24G SAS features to minimize storage costs in large scale deployments.

The SNIA has a new standard that enables SSDs to have an Ethernet interface, The Native NVMe-oF Drive specification defines pin outs for common SSD connectors. This enables these drives to plug into common platforms such as eBOFs (Ethernet Bunches of Flash). This talk will also discuss the latest Management standards for NVMe-oF drives. Developers will learn about how to program and use these new types of drives. Learning Objectives: The developer will understand how Ethernet drives are enabled; The developer will understand how to manage Ethernet drives; Then developer will understand the future of these drives.

End to End (E2E) Data Placement or intelligent placement of data onto media requires coordination between Applications, File System, and Zoned Block devices (ZBDs). If done correctly, E2E Data Placement with ZBDs will significantly reduce storage costs and improve application performance. The talk will walk through state of the art database systems and define their data placement characteristics with the associated storage cost. Next, we discuss how E2E data placement can use the concept of a file to determine data associativity and efficiently store the file as zones on ZBDs. We will cover crucial ZBD metrics and present examples of how applications and file systems can be modified to be ZBD friendly. Methods to estimate the gains in throughput and storage cost reduction using E2E data placement and Zone Block devices will also be shown. The attendees should leave the talk understanding how E2E data placement changes the role of Zoned Block Devices from storing LBAs to storing files. And how, by strategically mapping files, and it's data, as zones, one gain device capacity and reduces storage costs while improving both throughput and latency of your storage solution. Learning Objectives: The attendees should leave the talk understanding how E2E data placement changes the role of Zoned Block Devices,And how, by strategically mapping files, and it's data, as zones, one gain device capacity,and reduces storage costs while improving both throughput and latency of your storage solution.

High performance storage applications running on Intel® Xeon® processors actively utilize I/O capabilities and I/O accelerating features of platform by interfacing with NVMe devices. Such I/O-intensive applications may suffer from performance issues, which in a big picture can be categorized into three domains: I/O device bound – performance is limited by device capabilities core bound – performance is limited by algorithmic or microarchitectural code issues uncore bound – performance is limited by non-optimal interactions between devices and CPU. This talk focuses on the latter case. In Intel architectures the term “core” covers execution units and private caches, and all the rest of the processor is referred as “uncore”, which includes on-die interconnect, shared cache, cross-socket links, integrated memory and I/O controllers, etc. Activities happening on IO path in uncore cannot be monitored with traditional core-centric analyses, but there are pitfalls that require uncore-centric view. Intel servers provide such view by incorporating thousands of uncore performance monitoring events that can be collected in performance monitoring units (PMUs) associated with uncore IP blocks. However, using raw counters for performance analysis requires deep knowledge of hardware and appears incredibly challenging. In this talk we will discuss platform-level activities induced by I/O traffic on Intel® Xeon® Scalable processors and summarize practices for best performance of storage applications. We will overview telemetry points staying on the IO traffic path and eventually present developing uncore-specific performance analysis methodology, that reveals platform-level inefficiencies, including poor utilization of Intel® Data Direct I/O Technology (Intel® DDIO). Learning Objectives: Uncore-centric performance analysis methodology for I/O-intensive applications running on Intel server architectures,HW operations induced by PCIe traffic and HW-level observability for them; Practices to gain best IO performance on Intel server architectures.

Compute Express Link™ (CXL™) is an industry-supported cache-coherent interconnect for processors, memory expansion, and accelerators. Datacenter architectures are evolving to support the workloads of emerging applications in Artificial Intelligence and Machine Learning that require a high-speed, low latency, cache-coherent interconnect. The CXL specification delivers breakthrough performance, while leveraging PCI Express® technology to support rapid adoption. It addresses resource sharing and cache coherency to improve performance, reduce software stack complexity, and lower overall systems costs, allowing users to focus on target workloads. Attendees will learn how CXL technology maintains a unified, coherent memory space between the CPU (host processor) and CXL devices allowing the device to expose its memory as coherent in the platform and allowing the device to directly cache coherent memory. This allows both the CPU and device to share resources for higher performance and reduced software stack complexity. In CXL, the CPU host is primarily responsible for coherency management abstracting peer device caches and CPU caches. The resulting simplified coherence model reduces the device cost, complexity and overhead traditionally associated with coherency across an I/O link. Learning Objectives: Learn how CXL supports dynamic multiplexing between a rich set of protocols that includes I/O (CLX.io, based on PCIe®), caching (CXL.cache), and memory (CXL.mem) semantics.,Understand how CXL maintains a unified, coherent memory space between the CPU and any memory on the attached CXL device,Gain insight into the features introduced in the CXL specification

Improvements to the SMB3.1.1 client on Linux have continued at a rapid pace over the past year. These allow Linux to better access Samba server, as well as the Cloud (Azure), NAS appliances, Windows systems, Macs and an ever increasing number of embedded Linux devices including those using the new smb3 kernel server Linux (ksmbd). The SMB3.1.1 client for Linux (cifs.ko) continues to be one of the most actively developed file systems on Linux and these improvements have made it possible to run additional workloads remotely. The exciting recent addition of the new kernel server also allows more rapid development and testing of optimizations for Linux. Over the past year, performance has dramatically improved with features like multichannel (allowing better parallelization of i/o and also utilization of multiple network devices simultaneously), with much faster encryption and signing, with better use of compounding and improved support for RDMA. Security has improved and alternative security models are now possible with the addition of modefromsid and idsfromsid and also better integration with Kerberos security tooling. New features have been added include the ability to swap over SMB3 and boot over SMB3. Quality continues to improve with more work on 'xfstests' and test automation - tooling (cifs-utils) continue to be extended to make use of SMB3.1.1 mounts easier. This presentation will describe and demonstrate the progress that has been made over the past year in the Linux kernel client in accessing servers using the SMB3.1.1 family of protocols. In addition recommendations on common configuration choices, and troubleshooting techniques will be discussed. Learning Objectives: What new features are now possible when accessing servers from Linux?,What new tools have been added to make it easier to use SMB3.1.1 mounts from Linux?,What new features are nearing completion that you should you expect to see in the near future?,How can I configure the security settings I need to use SMB3.1.1 for my workload?,How can I configure the client for optimal performance for my workload?

The NVMe Key Value (NVMe-KV) Command Set has been standardized as one of the new I/O Command Sets that NVMe Supports. Additionally, SNIA has standardized a Key Value API that works with the NVMe Key Value allows access to data on a storage device using a key rather than a block address. The NVMe-KV Command Set provides the key to store a corresponding value on non-volatile media, then retrieves that value from the media by specifying the corresponding key. Key Value allows users to access key-value data without the costly and time-consuming overhead of additional translation tables between keys and logical blocks. This presentation will discuss the benefits of Key Value storage, present the major features of the NVMe-KV Command Set and how it interacts with the NVMe standards, and present open source work that is available to take advantage of Key Value storage. Learning Objectives: Present the standardization of SNIA KV API,Present the standardization of NVMe Key Value Command Set,Present the benefits of Key Valeu in computational storage,Present open source work on Key Value Storage.

The rapid improvement of overall $/Gbyte has driven the high performance All-Flash Array to be increasingly adopted in both enterprises and cloud datacenters. Besides the raw NAND density scaling with continued semiconductor process improvement, data reduction techniques have and will play a crucial role in further reducing the overall effective cost of All-Flash Array. One of the key data reduction techniques is compression. Compression can be performed both inline and offline. In fact, the best All-Flash Arrays often do both: fast inline compression at a lower compression ratio, and slower, opportunistic offline deep compression at significantly higher compression ratio. However, with the rapid growth of both capacity and sustained throughput due to the consolidation of workloads on a shared All-Flash Array platform, a growing percentage of the data never gets the opportunity for deep compression. There is a deceptively simple solution: Inline Deep Compression with the additional benefits of reduced flash wear and networking load. The challenge, however, is the prohibitive amount of CPU cycles required. Deep compression often requires 10x or more CPU cycles than typical fast inline compression. Even worse, the challenge will continue to grow: CPU performance scaling has slowed down significantly (breakdown of Dennard scaling), but the performance of All-Flash Array has been growing at a far greater pace. In this talk, I will explain how we can meet this challenge with a domain-specific hardware design. The hardware platform is a FPGA-based PCIe card that is programmable. It can sustain 5+Gbyte/s of deep compression throughput with low latency for even small data block sizes (TByte/s BW and less than 10ns of latency) and the almost unlimited parallelism available on a modern mid-range FPGA device. The hardware compression algorithm is trained with a vast amount of data available to our systems. Our benchmarks show it can match or outperform some of the best software compressors available in the market without taxing the CPU. Learning Objectives: Hardware Architecture for Inline Deep Compression,Design of Hardware Deep Compression Engine,Inline and offline compression of All-Flash Array.

Zoned Namespaces represent the first step towards the standardization of Open-Channel SSD concepts in NVMe. Specifically, ZNS brings the ability to implement data placement policies in the host, thus providing a mechanism to lower the write-amplification factor (WAF), (ii) lower NAND over-provisioning, and (iii) tighten tail latencies. Initial ZNS architectures envisioned large zones targeting archival use cases. This motivated the creation of the "Append Command” - a specialization of nameless writes that allows to increase the device I/O queue depth over the initial limitation imposed by the zone write pointer. While this is an elegant solution, backed by academic research, the changes required on file systems and applications is making adoption more difficult. As an alternative, we have proposed exposing a per-zone random write window that allows out-of-order writes around the existing write pointer. This solution brings two benefits over the “Append Command”: First, it allows I/Os to arrive out-of-order without any host software changes. Second, it allows in-place updates within the window, which enables existing log-structured file systems and applications to retain their metadata model without incurring a WAF penalty. In this talk, we will cover in detail the concept of the random write window, the use cases it addresses, and the changes we have done in the Linux stack to support it. Learning Objectives: Learn about general ZNS architecture and ecosystem,Learn about the use cases supported in ZNS and the design decisions in the current specification with regards to in-place updates and multiple inflight I/Os,Learn about new features being brought to NVMe to support in-place updates and transparent hight queue depths.

The Software-Enabled Flash API gives unprecedented control to application architects and developers to redefine the way they use flash for their hyperscale applications, by fundamentally redefining the relationship between the host and solid-state storage. Dive deep into new Software-Enabled Flash concepts such as virtual devices, Quality of Service (QoS) domains, Weighted Fair Queueing (WFQ), Nameless Writes and Copies, and controller offload mechanisms. This talk by KIOXIA (formerly Toshiba Memory) will include real-world examples using the new API to define QoS and latency guarantees, workload isolation, minimize write amplification by application-driven data placement, and achieve higher performance with customized flash translation layers (FTL). Learning Objectives: Provide an in-depth dive into using the Software Enabled Flash API,Map application workloads to Software Enabled Flash structures,Understand how to implement QoS requirements using the API.

The NVM Express workgroup is introducing new features frequently, and the Linux kernel supporting these devices evolves with it. These ever moving targets create challenges when developing tools when new interfaces are created, or older ones change. This talk will provide information on some of these recent features and enhancements, and introduce the open source 'libnvme' project which implements an open source library available in public git repositories that provides access to all NVM Express features with convenient abstractions to the kernel interfaces interacting with your devices. The session will demonstrate integrating the library with other programs, and also provide an opportunity for the audience to share what additional features they would like to see out of this common library in the future. Learning Objectives: Explain protocol and host operating system interaction complexities,Introduce libnvme and how it manages those relationships,Demonstrate integration with applications.

The efficiency, performance and choice in NVMe-oF is enabling some very unique and interesting use cases – from AI/ML to Hyperconverged Infrastructures. Artificial Intelligence workloads process massive amounts of data from structured and from unstructured sources. Today most deep learning architectures rely on local NVMe to serve up tagged and untagged datasets into map-reduce systems and neural networks for correlation. NVMe-oF for Deep Learning infrastructures enables a shared data model to ML/DL pipelines without sacrificing overall performance and training times. NVMe-oF is also enabling HCI deployment to scale without adding more compute, enabling end customers to reduce dark flash and reduce cost. The talk explores these and several innovative technologies driving the next storage connectivity revolution. Learning Objectives: Storage architectures for Deep Learning Workloads,Extending the reach of HCI platforms using NVMe-oF,Ethernet Bunch of Flash architectures.

NVMe is the fastest growing storage technology of the last decade and has succeeded in unifying client, hyperscale and enterprise applications into a common storage framework. NVMe has evolved from a being a disruptive technology to becoming a core element in storage architectures. In this session, we will talk about the NVMe transition to a merged base specification inclusive of both NVMe and NVMe-oF architectures. We will provide an overview of the latest NVMe technologies, summarize the NVMe standards roadmap and describe the latest NVMe standardization initiatives. NVMe technology will present a number of areas of innovation that preserve our simple, fast, scalable paradigm while extending the broad appeal of NVMe architecture. These continued innovations will ready the NVMe technology ecosystem for yet another period of growth and expansion. Learning Objectives: Learn about the NVMe transition to a merged base specification inclusive of both NVMe and NVMe-oF architectures. Receive a summary of the NVMe standards roadmap,Understand the latest NVMe standardization initiatives.

With PMEM boasting a much higher density and DRAM-like performance, applying it to in-memory caching such as memcached seems like an obvious thing to try. Nonetheless, there are questions when it comes to new technology. Would it work for our use cases, in our environment? How much effort does it take to find out if it works? How do we capture the most value with reasonable investment of resource? How can we continue to find a path forward as we make discoveries? At Twitter, we took an iterative approach to explore cache on PMEM. With significant early help from Intel, we started with simple tests in memory mode in a lab environment, and moved on to app_direct mode with modifications to Pelikan (pelikan.io), a modular open-source cache backend developed by Twitter. With positive results from the lab runs, we moved the evaluation to platforms that more closely represent Twitter’s production environment, and uncovered interesting differences. With better understanding of how Twitter’s cache workload behaves on the new hardware, and our insight into Twitter’s cache workload in general, we are proposing a new cache storage design called Segcache that, among other things, offers flexibility with storage media and in particular is designed with PMEM in mind. As a result, it achieves superior performance and effectiveness when running either on DRAM or PMEM. The whole exploration was made easier by the modular architecture of Pelikan, and we added a benchmark framework to support the evaluation of storage modules in isolation, which also greatly facilitated our exploration and development. Learning Objectives: Demonstrate the feasibility of using PMEM for caching and meeting production requirements. Provide a case study on how software companies can approach and adopt new technology like PMEM iteratively. Provide observations and suggestions on how to promote a more integral hardware/software design cycle.

Software-based memory-to-memory data movement is common, but takes valuable cycles away from application performance. At the same time, offload DMA engines are vendor-specific and may lack capabilities around virtualization and user-space access. This talk will focus on how SDXI(Smart Data Acceleration Interface), a newly formed SNIA TWG is working to bring an extensible, virtualizable, forward-compatible, memory to memory data movement and acceleration interface specification. As new memory technologies get adopted and memory fabrics expand the use of tiered memory, data mover acceleration and its uses will increase. This TWG will encourage adoption and extensions to this data mover interface. Learning Objectives: A new proposed standard for a memory to memory data movement interface,A new TWG to develop this standard,Usecases where this will apply to evolving storage architecture with memory pooling and persistent memory

Since the advent of the Smart Phone over a decade ago, we've seen several new "Smart" technologies, but few have had a significant impact on the data center until now. SmartNICs and SmartSSDs will change the landscape of the data center, but what comes next? This talk will summarize the state of the SmartNIC market by classifying and discussing the technologies behind the leading products in the space. Then it will dive into the emerging technology of SmartSSDs and how they will change the face of storage and solutions. Finally, we'll dive headfirst into the impact of PCIe 5 and Compute Express Link (CXL) on the future of Smart Acceleration on solution delivery. Learning Objectives: Understand the current state of the SmartNIC market & leading products.,Introduce the concept of SmartSSDs and two products available today.,Discuss the future of Device to Device (D2D) communications using PCIe, CXL/CCIX.,Lay out a vision for where composable solutions leveraging multiple devices on a PCIe buss communicating directly.

The ZFS L2ARC is now more than 10 years old. Over that time, a lot of secret incantations and tribal knowledge have been created by users, testers, developers, and the odd sales or marketing person. That collection of community wisdom informs the use and/or tuning of ZFS L2ARC for certain IO profiles, dataset sizes, server class, share protocols, and device types. In this talk, we will review a case study in which we tested a few of these L2ARC myths on an NVMe-capable OpenZFS storage appliance. Can high-speed NVMe flash devices keep L2ARC relevant in the face of ever-increasing memory capacity for ARC (primary cache) and all-flash storage pools? Learning Objectives: 1) Overview of ZFS L2ARC design goals and high level implementation details that pertain to our findings; 2) Performance characteristics of L2ARC during warming and when warmed, plus any tradeoffs or pitfalls with L2ARC in these states; 3) How to leverage NVMe as L2ARC devices to improve performance in a few storage use cases.

5G Wireless technology will bring vastly superior data rates to the edge of the network. However, with this increase in bandwidth will come applications that significantly increase overall network throughput. Video applications will likely explode as end users have large amounts of data bandwidth to operate. Video will not only require advanced compression but will require large amounts of data storage. Combining advanced compression technologies with storage will allow a high density of storage and compression in a small amount of rack space with little power, ideal for placement at the edge of the network. NVMe based module provides the opportunity to use computational storage elements to enable edge compute and video compression. This presentation will provide technical details and various options to combine video and storage on an NVMe interface. Further, it will explore how this NVMe device can be virtualized for both storage and video in an edge compute environment. Learning Objectives: 1) Understand how NVMe can be used for both video and storage; 2) Understand how computational storage can be virtualized using NVMe; 3) Understand why combinational element modules such as Video Storage will become important after deployment of 5G networks.

By now, you have a good understanding of SNIA Swordfish™ and how it extends the DMTF Redfish® specification to manage storage equipment and services. Attend this presentation to learn what’s new and how the specification has evolved since last year. The speaker will share the latest updates ranging from details of features and profiles to new vendor-requested functionality that’s supporting the specification from direct-attached to NVMe. You won’t want to miss this opportunity to be brought up-to-speed. Learning Objectives: 1) Educate the audience on what’s new with Swordfish; 2) Describe features and profiles and why they are useful; 3) Provide an overview of vendor-requested Swordfish functionality.

DMTF's Redfish® is a standard API designed to deliver simple and secure management for converged, hybrid IT and the Software Defined Data Center (SDDC). Both human readable and machine capable, Redfish leverages common Internet and web services standards to expose information directly to the modern tool chain. This presentation will provide an overview of Redfish, what’s new in the Redfish ecosystem, as well as adoption in the broader standards community. You’ll also learn more about the general Redfish data model, including the base storage models and infrastructure that are used by SNIA Swordfish extensions. Learning Objectives: 1) Introduce the DMTF Redfish API; 2) Provide an update on the latest Redfish developments; 3) Understand how SNIA Swordfish builds on Redfish.

The SNIA NVMP TWG continues to make significant progress on defining the architecture for interfacing applications to PM. In this talk, we will focus on the important Remote Persistent Memory scenario, and how the NVMP TWG’s programming model applies. Application use of these interfaces, along with fabric support such as RDMA and platform extensions, are part of this, and the talk will describe how the larger ecosystem fits together to support PM as low-latency remote storage.

Whether you are a storage vendor, consumer, or developer, the performance of storage solutions affects you. Assessing the performance of large and complex storage solutions requires some level of performance testing lab, and there are many factors to consider. From network topology to load generator CPU, all components must be selected and configured with care to avoid unintended bottlenecks. In this session, we will review a few best practices and lessons learned, including: whether virtual clients are feasible and my experiences attempting performance testing on several different hypervisors, best practices for network configuration, and how to use maximum effective data rates to avoid unintended bottlenecks. Finally, we will conclude with a review of data comparing different physical load generating hardware and its effect on measured performance. Learning Objectives: 1) Effect of load generating client hardware on measured performance; 2) Avoiding unintended bottlenecks by using interconnect maximum effective data rates; 3) Best practices for configuring a performance lab network and load generators.

SMB 3.1.1 is the state of the art for secure remote file access, but deploying it for clouds and mobile users can be very challenging; TCP/445 is often blocked, networks are often slow, and edge file servers are often feared. The Microsoft SMB3 team has now built the first implementation of SMB3 over QUIC, a UDP/TLS transport pioneered by Google. This allows secure tunneling of SMB3 over internet-friendly ports. Furthermore, we have added compression for SMB3, which allows significant data savings over congested and low bandwidth networks. In this talk we’ll discuss these new options, as well as other recent security and feature capabilities nearing completion. Learning Objectives: 1) SMB3 over new transport; 2) SMB3 over wide area networks; 3) SMB3 protocol update.

Attendees of this presentation will learn how to use several open source tools ( https://github.com/jharriga/ ) to evaluate object storage platforms. These tools provide automation and customer-based object storage workloads for activities such as filling a cluster, aging a cluster and running steady-state mixed operation workloads. One of the tools, RGWtest, automates pool creation, logs cluster statistics such as system resource utilization (CPU and memory) and submits workloads through COSbench - Intel’s open source object storage benchmark tool. A demonstration of the tools will be part of the presentation. Learning Objectives: 1) How to install, configure and execute the object storage workload tools; 2) How to interpret workload run results; 3) How to design and size object storage workloads.

PowerShell is a task-based command-line shell and scripting language that helps rapidly automate tasks that manage operating systems (Linux, macOS, and Windows) and processes. PowerShell is open-source, object-based and includes a rich expression parser and a fully developed scripting language with a gentle learning curve. The PowerShell Toolkit for SNIA Swordfish™ provides simple to use commands for managing any Swordfish Implementation (including the SNIA API Emulator). Attend this session to learn how to use the SNIA Swordfish PowerShell Module to jumpstart development of your own Swordfish implementation. Learning Objectives: 1) Provide an overview of the PowerShell open source tool kit; 2) Describe how the PowerShell tool kit can speed a Swordfish implementation; 3) Educate the audience on how to use and access the PowerShell tool kit.

After a year of implementation progress of the The SMB3 .1.1 POSIX Extensions, a set of protocol extensions to allow for optimal Linux and Unix interoperability with NAS and Cloud file servers - what is the current status - what have we learned - what has changed in the protocol specification in the past year - what advice do we have for implementers - and users … These extensions greatly improve the experience for users of Linux. This presentation will review the state of the protocol extensions and their current implementation in the Linux kernel and Samba among others, and provide an opportunity for feedback and suggestions for additions to the POSIX extensions. This has been an exciting year with many improvements to the implementations of the SMB3.1.1 POSIX Extensions in Samba and Linux! Learning Objectives: 1) What is the current status of Linux interoperability with various SMB3.1.1 servers?; 2) How have the protocol extensions for Linux/POSIX progressed over the past year? What has changed? What works?; 3) What are suggestions for implementors of SMB3.1.1 servers?; 4) What is useful information for users to know to try these extensions?; 5) How do new Linux file system features map to these extensions?

NVMe KV (Key-Value) is an industry-wide proposal for a new command structure that allows access to data on an NVMe SSD controller using a “key” rather than a block address. Developed within the NVM Express technical working group, this Key Value command set provides a “key” to store a corresponding “value” on non-volatile media, then retrieves that “value” from the media by specifying the corresponding “key.” In addition to extensive work being undertaken by the NVM Express working group, the SNIA has completed an overarching KeyValue API released for a membership vote in January 2019. This presentation examines standardization efforts going on within SNIA and the NVM Express working group that will allow users to access key-value data without the costly and time-consuming overhead of additional translation tables between keys and logical blocks. Learning Objectives: 1) What is the status of standards development; 2) Overview of what is in the SNIA KV API; 3) Overview of what is in the NVMe KV proposal.

A variety of persistent memory technologies with DRAM-class performance, known as “memory class storage” or “MCS”, have appeared on the horizon. MCS will change the architecture of future computing systems. These technologies include carbon nanotube memory, phase change memory, magnetic spin memory, and resistive memory, and each has unique characteristics that can complicate systems designed to exploit them. The JEDEC DDR5 NVRAM specification in process intends to bridge the differences between the technologies and provide systems designers with a unified specification for DRAM-class persistent memory. Nantero NRAM is a NVRAM based on carbon nanotube cell structures that provides a DDR4 or DDR5 interface to the system, and provides additional enhancements to yield 20% higher performance at the same clock rate. Learning Objectives: 1) Attendees are exposed to system level advantages of memory class storage devices that operate at DRAM speeds but provide data persistence; 2) JEDEC is working on a new specification to standardize the interface to a variety of NVRAMs which provide memory class storage; 3) Nantero NRAM is a memory class storage device with better than DRAM performance.

One of the most common benchmarks in the storage industry is 4KiB random read I/O per second. Over the years, the industry first saw the publication of 1M I/Ops on a single box, then 1M I/Ops on a single thread (by SPDK). More recently, there have been publications outlining 10M I/Ops on a single box using high performance NVMe devices and more than 100 CPU cores. This talk will present a benchmark of SPDK performing more than 10 million random 4KiB read operations per second from a single thread to 20 NVMe devices, a large advance compared to the state of the art of the industry. SPDK has developed a number of novel techniques to reach this level of performance, which will be outlined in detail here. These techniques include polling, advanced MMIO doorbell batching strategies, PCIe and DDIO considerations, careful management of the CPU cache, and the use of non-temporal CPU instructions. This will be a low level talk with real examples of eliminating data dependent loads, profiling last level cache misses, pre-fetching, and more. Additionally, there remains a number of techniques that have not yet been employed that warrant future research. These techniques often push devices outside of their original intended operating mode, while remaining within the bounds of the specification, and so often require collaboration between NVMe controller and device designers, the NVMe specification body, and software developers such as the SPDK team. Learning Objectives: 1) Optimal use of NVMe devices; 2) Optimal use of PCIe and MMIO in a storage stack; 3) Leveraging advanced x86-64 CPU instructions and making best use of the CPU cache.

The applications using NVMe, SAS, SATA, USB based storage devices find a new use and one of them is mining for open source cryptocurrency such as Burst Coin. Using low power or solar power HDD’s, SSD and most importantly NVMe technology can improve turnaround latency and build blocks on a faster scale. Utilization of security protocols allows anonymization as well as protection of the users and vendors. Burst coin has an extensive developer’s community and can run on the cloud, has dApps, its own ATM and more. More importantly, Burst is based on Proof of Capacity protocol and utilizes storage drives, arrays and enables users to build the mesh net of miners and secure blockchain protocol. Using NVMe devices we can accelerate transactions. We will show how using performance analytics tools we can create predictions on building blockchain blocks and provide insights into date usage efficiency. Additional value benefits are saving energy costs, address new markets and create adoption in the larger markets. The usage of storage devices and blockchain will enable HW secure banking transactions (via smart contracts) and much more. Learning Objectives: 1) Learn how Proof of Capacity works with storage devices; 2) Find new applications for Storage applications; 3) Understand Data Science perception with Blockchain.

A growing trend in the market is capacity of data. This data growth is creating challenges within modern storage infrastructures and a new way to think of data is needed. The SNIA Computational Storage TWG was formed in October of 2018 to address this opportunity for the Storage industry to use innovative technologies that bring computational capabilities closer to or within the storage device. The goal of the TWG is to develop an architecture and set of definitions that allow for common communication about the problem set as well as a standardized interface between the Computational Storage device and host or peer devices. Ultimately the TWG will drive standardization of the necessary Computational Storage interfaces across the industry, contribute to and drive the development of software necessary to enable the usages, and promote the education of the industry regarding Computational Storage. This session will provide an overview of Computational Storage, the focus areas of the TWG, and the opportunities for engagement with the rest of the industry in this space. Learning Objectives: 1) Overview of the Computational Storage TWG goals; 2) Walk through the current architectural paradigms defined in the TWG; 3) Give the industry a common language to speak regarding computational storage.

Last year at SDC we reviewed the integration of crypto which made use of DPDK’s existing variety of drivers to usher in the capability. This year we are expanding our use of DPDK with the addition of a compression! This talk will outline the overall architecture of the compression module and explain in detail how we are managing the layout of the device and leveraging the Persistent Memory Development Kit to store metadata in super-fast persistent memory. Learning Objectives: 1) Understand new SPDK compression feature; 2) Understand the value of SPDK in general; 3) Learn about the SPDK Community.

This talks explains the exciting new features in the Linux NVMe driver and software target in the last two years, as well as the relevant block layer changes to support these features. Learning Objectives: 1) Learn about new Linux features; 2) Learn about new NVMe features; 3) Have fun!

LTO (Linear Tape Open) is an industry standard format for tape drives and media. To begin this talk we will give a brief overview of LTO tape: how data is recorded and accessed on tape, and some characteristics that make it very different from earlier forms of computer tape storage. We will then discuss the current state of LTO tape, including “feeds and speeds”, backwards/forwards drive and media compatibility, and the LTO Consortium’s roadmap for the future. Finally, we’ll discuss the Linear Tape File System (LTFS): what it is, how it works, and what benefits it provides. We’ll end with a detailed description of the latest important feature in LTFS version 2.5, Incremental Indexes, including a discussion of the impetus for Incremental Indexes, the benefits they provide, and an explanation of how they work. This talk is suitable for newcomers to tape storage as well as those who are already taking advantage of LTO tape and LTFS. Learning Objectives: 1) Understand the operation and current state of LTO tape storage, and its roadmap for the future; 2) Understand the use and benefits of the Linear Tape File System (LTFS); 3) Learn how adding Incremental Indexes to LTFS improves performance and storage efficiency while preserving backwards compatibility.

Introducing pmemkv, an open-source local key/value store for persistent memory based on PMDK. Written in C/C++, pmemkv provides optimized language bindings for Java, JavaScript, and Ruby. Pmemkv includes multiple storage engines that are tailored for different use-cases. Fast, flexible and bulletproof, pmemkv is an easy way to modify applications to use persistent memory. Learning Objectives: 1) Learn about a local/embedded key-value data store optimized for persistent memory; 2) Learn how cloud applications can easily manage key/value data on persistent platforms; 3) Code samples that demonstrate the ease of use of different language bindings.

RocksDB, a high performance key-value database developed by Facebook, has proven effective in using the high data speeds made possible by Solid State Drives (SSDs). By leveraging the NVMe standard, Eideticom’s NoLoad® presents FPGA computational storage processors as NVMe namespaces to the operating system and enables efficient data transfer between the NoLoad® Computational Storage Processors (CSPs), host memory and other NVMe/PCIe devices in the system. Presenting Computational Storage Processors as NVMe namespaces has the significant benefit of minimal software effort to integrate computational resources. In this presentation we use Eideticom’s NoLoad® to speed up RocksDB. Compared to software compaction running on a Dell R7425 PowerEdge server, our NoLoad®, running on Xilinx’s Avleo U280, resulted in 6x improvement in database transactions and 2.5x reduction is CPU usage while reducing worst case latency by 2.7x. Learning Objectives: 1) Computational storage with NVMe; 2) Presenting computational storage processors as NVMe namespaces; 3) Accelerating database access with NVMe computational storage processors.

Since the first release of NVMe 1.0 in 2011, the NVMe family of specifications continue to expand to support current and future storage markets, increasing the amount of new features and functionality. With that natural, organic growth, however, comes additional complexity. In order to refocus on simplicity and ease-of-development, the NVM Express group has undertaken a massive effort to refactor the specification. The upcoming refactored specification - NVMe 2.0 - integrates the scalable and flexible NVMe over Fabrics architecture within the NVMe base specification, meeting the needs of platform designers, device vendors and developers. But how can developers optimally design their products using the new NVMe 2.0 specification? This session will provide attendees with the following insights: • An overview of the existing specification structure, its logic and limitations • Highlights on how developers use the current specification before refactoring • Information showing how the refactored specification enables companies to architect their products with better awareness of future areas of innovation • Details on how new features and functionalities will be included in the refactored specification • Descriptions of how developers can leverage the refactored NVMe 2.0 specification to simply and efficiently bring new products to market • Examination of the current projects and how to contribute Learning Objectives: 1) Overview of the current NVMe specification structure; 2) Introduction to NVMe 2.0: the refactored specification enables companies and developers to simply and efficiently bring new products to market; 3) The new features and functionalities that will be included in NVMe 2.0 and how to get involved in current projects.

Over the years, SSD QoS has become more important to a variety of storage market segments. Traditional latency reporting methods do not always accurately depict QoS behaviors. This is problematic when attempting to understand what events lead to a specific QoS level and how to mitigate latency events that lead to levels of QoS. Defining correct statistical techniques for large populations of latencies deepens our understanding of what drives levels of QoS. Advanced statistical techniques, such a machine learning and utilizing AI, allows for deeper understanding of what drives QoS and how to correctly manage large quantities of latencies. New visualization techniques enhance capabilities to understand latency behavior and define critical scenarios that drive latency. Learning Objectives: 1) Identify shortcomings of current QoS reporting; 2) Generate more reliable QoS values; 3) Techniques to broaden understanding of groups of latencies; 4) Identification of critical transitions in latency; 5) Identify inaccuracies that inhibit understanding QoS.

With the onset of the Computational Storage TWG and growth of interest in the market for these new and emerging solutions, it is imperative to understand how to develop, deploy and scale these new technologies. This session will walk through the new definitions, how each can be deployed and show use cases of NGD Systems Computational Storage Devices (CSD). Learning Objectives: 1. Learn the different kinds of Computational Storage 2. Understand the use cases for each type of solutions 3. Determine the ease of deployment and the value of these solutions

SMB3 has seen significant adoption as the storage protocol of choice for running private cloud deployments. With the recent advances in persistent memory technologies, we will take a look at how we can leverage the SMB3 protocol in conjunction with SMBDirect/RDMA to provide very low latency access to persistent memory devices across the network. With the increasing popularity of cloud storage - technologies like Azure Files which provide seamless access to cloud stored data via the standard SMB3 protocol is seeing significant interest. One of the key requirements in this space is to be able to run SMB3 over a secure / firewall friendly internet protocol. We will take a quick look at some work we are doing to enable SMB3 over QUIC - which is a recent UDP based transport with strong security and interop properties. We will also explore some work we have done to enable on-the-wire compression for SMB3. Learning Objectives: 1) Learn how we can use SMB3 to setup direct RDMA access to remote persistent memory; 2) Using QUIC as a transport for SMB3; 3) How can we use data compression algorithms to optimize SMB data transfer?

This talk describes work going on in three different organizations to enable scale out management of NVMe SSDs. The soon to be released NVME-MI 1.1 standard will allow management from host based agents as well as BMCs. This might be extended to allow support for Binary Encoded JSON (BEJ) in support of host agents and BMCs that want to support the Redfish Standard. We will also cover work going on in SNIA (Object Drive TWG) and DMTF in support. Learning Objectives: 1) Principles and limitations of scale out datacenter management; 2) An understanding of the NVMe-MI standard; 3) A Redfish profile for NVMe drives; 4) Inside the box management networks and outside the box management networks; 5) Platform Layer Data Model (PLDM).

As NVDIMMs enter the realm of standard equipment on servers and storage arrays and NVMe is standard equipment for servers and consumer devices alike, what is the actual performance advantage of using NVDIMM over NVMe, or NVMe over SAS or SATA SSDs? First, we’ll review some purely synthetic benchmarks of single devices using different storage technologies and see how they differ. Then, we’ll enter a more real world environment and see what performance gains can be had. One use of NVDIMMs is as a transaction log to allow quick acknowledgement of write operations. In our real-world scenario, we discuss the performance differences of using NVDIMMs, NVMe Flash, or SAS/SATA Flash as the SLOG or “write-cache” for an OpenZFS pool. Learning Objectives: 1) Performance differences between different storage media and storage transports for transactional workloads; 2) Basic overview of OpenZFS and how a SLOG works; 3) Impact of low latency NVDIMM and NVMe storage for application and user latency.

The Storage Performance Development Kit (SPDK) open source project is gaining momentum in the storage industry for its drivers and libraries for building userspace, polled mode storage applications and appliances. The SPDK NVMe driver was SPDK’s first released building block and is its most well-known. The driver’s design and architecture is heavily influenced by SPDK’s userspace polled-mode framework which has resulted in some significant differences compared to traditional kernel NVMe drivers. This presentation will present an overview of the SPDK NVMe driver’s architecture and design, a historical perspective on key design decisions and a discussion on the driver’s advantages and limitations. Learning Objectives: 1) Gain a deeper understanding of the architecture and design of the SPDK NVMe driver; 2) Identify the key design differences between a userspace polled-mode driver and a traditional kernel-mode driver; 3) Describe the key advantages and limitations of SPDK and its polled mode NVMe driver.

Persistent Memory is getting a lot of attention. SNIA has released a programming standard, NVDIMM makers, with the help of JEDEC, have created standardized hardware to develop & test PM, and chip makers continue to promote upcoming devices, although few are currently available. In this talk two industry analysts, Jim Handy & Tom Coughlin, will provide the state of Persistent Memory and show a realistic roadmap of what the industry can expect to see and when they can expect to see it. The presentation, based on three critical reports covering New Memory Technologies, NVDIMMs, and Intel’s 3D XPoint Memory (also known as Optane) will illustrate the Persistent Memory market, the technologies that vie to play a role, and the critical economic obstacles that continue to impede these technologies’ progress. We will also explore how advanced logic process technologies are likely to cause persistent memories to become a standard ingredient in embedded applications, such as IoT nodes long before they make sense in servers. Learning Objectives: 1) What is the state of emerging memory technologies; 2) What technologies will be used in future NVDIMMS; 3) Emerging memory use in embedded and enterprise applications; 4) What are the costs for making emerging memories.

Applying micro service patterns to storage giving each workload its own Container Attached Storage (CAS) system. This puts the DevOps persona within full control of the storage requirements and brings data agility to k8s persistent workloads. We will go over the concept and the implementation of CAS, as well as its orchestration. Learning Objectives: 1) Go over the modern day apps and their storage needs; under the notion of applications have changed someone forgot to tell storage; 2) What are the problems to use technologies like user space IO, in particular using technologies like SPDK among others; 3) Looking devops and the k8s model, how can we bring the power of user space storage in developers hands? Virtio for containers? direct access from the go run time for example SPDK?; 4) We have tried both, and like to share the outcome of this with you.

Increasing proliferation of Artificial Intelligence, E-commerce, Big Data and Cloud applications is leading to highly diversified workloads and use cases in hyperscale data centers, which poses new challenges to solid state storage in terms of performance, flexibility and TCO optimizations. Moreover, there are increasing demands for software/hardware co-optimization and more control over I/O path from applications. Standard SSDs that are tuned for a few generic workloads cannot meet these challenges, resulting in suboptimal performance and TCO. We present our Dual-Mode SSD Architecture, a new storage architecture designed for our next-generation hyperscale data centers. We define our Open Channel SSD specification and build a Dual-Mode SSD platform that supports both Open Channel mode and standard NVMe mode. We develop our Open Channel software stack in full user space as well as in kernel space. Working seamlessly with our storage engine software, we build customized FTL solutions for different business applications. Our software/hardware co-optimization solutions is leading to significant benefits in performance, Quality-of-Service and TCO. Learning Objectives: 1) Challenges to solid storage systems in next-generation hyperscale data centers; 2) Dual-Mode SSD architecture; 3) Full user space Open Channel software stack, and software/hardware co-optimization solutions.

The talk covers (i) the characteristics of open-channel SSD management, (ii) introduces the new open-channel/Denali interface, (iii) provides background on LightNVM, the Linux subsystem that we designed and implemented for open-channel SSD management, and at last, we show the effectiveness of open-channel SSDs against state-of-art block-based SSDs. Learning Objectives: 1) Understand Open-Channel SSDs; 2) Project status; 3) Background on storage and applications.

PCI Express® (PCIe®) 3.0 architecture has enabled Flash Storage to transition to high speed, low latency power efficient performance over the past few years. However, the hunger for additional performance in power constrained devices continues and PCI-SIG® continues its nearly three decade history of delivering performance doubling and additional features with the development of the PCIe 4.0 and PCIe 5.0 specifications. This presentation will review the major features of PCIe 4.0 and PCIe 5.0 technology, which will continue to enable power efficient performance required as NAND capacities scale and faster SCM (Storage Class Memories) become mainstream. Session attendees will gain insight into the current status of the PCIe 4.0 technology rollout and testing and will learn about the PCIe 5.0 specification development and timeline for completion in 2019. Learning Objectives: 1) Learn how PCIe is becoming the I/O of choice for storage; 2) Gain insight into the status of PCIe 4.0 roll-out for storage applications; 3) Understand the PCIe roadmap to 32GT/s.